SystemVerilog Meets C++: Re-use of Existing C/C++ Models Just Got Easier

The OVM and VMM methodologies each provide powerful, flexible and intuitive frameworks for the construction of SystemVerilog verification environments. However, many SystemVerilog users also have models written in C, C++, or sometimes SystemC. Furthermore, the emergence of the SystemC TLM-1 and TLM-2.0 transaction-level modeling standards is having an impact on communication styles within SystemVerlog verification environments. This paper offers practical guidance on using the SystemVerilog Direct Programming Interface (DPI) to integrate existing C, C++ and SystemC code into an OVMor VMM-based SystemVerilog testbench without jeopardizing portability from one simulator to another. This is achieved by presenting a set of simple, robust guidelines for creating portable DPI code.